Okmetic E-SOI® is an enhanced, highly uniform Silicon On Insulator wafer with tight ±0.1 µm thickness tolerance not dependent on device layer thickness. The significantly lower device layer thickness variation makes E-SOI® an ideal platform for demanding MEMS sensors and power applications as it enables device designs out of reach with traditional techniques in addition to improved device performance and precision.
Okmetic E-SOI® is an enhanced bonded Silicon On Insulator wafer, which has buried oxide (BOX) layer between a bottom handle wafer and a top silicon wafer that is thinned with extreme precision to achieve best-in-class device layer thickness uniformity, independent of the device layer thickness.
E-SOI® wafer’s best-in-class device layer thickness
uniformity is not dependent on device layer thickness,
and this enables the most demanding device designs
Typically MEMS sensors and IC devices are built on the device layer whilst the buried oxide (BOX) is an excellent electric insulating layer and an effective etch stop. The BOX layer can also act as a sacrificial layer for complex components and movable parts. The handle wafer supports the structure, but can also be utilized in sealing the structure or as part of the sensing element.
Enhanced SOI for demanding application needs
Due to its highly uniform device layer, Okmetic E-SOI® is an ideal platform for demanding applications such as silicon photonics, silicon timing devices, HV BCD devices and high-precision silicon-based MEMS sensors and more. E-SOI® wafers are used especially in silicon photonics, which is a rapidly growing technology with applications such as optical transceivers, optical sensors and LiDAR systems.
Okmetic E-SOI® has unprecedented properties. The device layer thickness of Enhanced SOI is freely adjustable between 1.0 µm and >100 µm and the thickness tolerance independent of target thickness is as low as ±0.1 µm. Also the buried oxide layer thickness is freely adjustable between 0.5 µm and 3 µm.
E-SOI® is an ideal platform e.g. for silicon photonics and
timing devices, HV BCD devices and high-precision MEMS sensors
As with other Okmetic Silicon On Insulator wafers, the E-SOI® wafer can be customized to match your exact device and process needs. Okmetic has the widest selection of silicon wafers in the market, and our sales and technical support are happy to help in customization and selection of wafer parameters to find an optimal solution for your needs.
TYPICAL SOI SPECIFICATIONS
|Growth method||Cz, MCz, A-MCz®|
|Crystal orientation||<100>, <110>,<111>|
|N type dopants||phosphorus, red phosphorus|
|P type dopants||Boron|
|Resistivity||From < 0.001 to > 7,000 Ohm-cm|
|Device layer thickness||From 1 μm to > 200 μm
Tolerance ±0.5 μm (standard BSOI), ±0.3 μm (0.3 SOI),
±0.1 μm (E-SOI®), ±0.7 μm (C-SOI®)
|Buried oxide layer thickness||From 0.3 μm to 4 μm, typically between 0.5 μm
and 2 μm
Type: thermal oxide
|Handle wafer thickness||From 300 μm to 950 μm, typically 725 μm in 200mm wafer and 380 μm in 150mm
Back surface polished or etched
Significantly lower device layer thickness variation enabling true innovation
The core benefit of E-SOI® wafer compared to standard BSOI is superior device layer thickness uniformity that is not dependent on the device layer thickness. E-SOI® thus enables more advanced device designs than can be achieved with traditional BSOI technologies let alone with bulk silicon micromachining.
E-SOI® wafer is an advanced solution with multiple benefits:
- More freedom to device design than with competing technologies
- Improved device performance and precision
- Reduced device size and cost
- Improved yield