Discrete Power Device wafers 

Discrete Power Device wafers offer customizable resistivity between <0.001 and >350 Ohm-cm, tight resistivity control, low and controlled Oi level and low defect density. MCz and A-MCz® crystal growth method coupled with wide selection of wafer parameters guarantee customized, high value-added wafer solutions with reduced power losses.   

Okmetic has been supplying Discrete Power Device wafers for decades. The company’s strong crystal growth expertise combined with high supply volumes provide the foundation also for this market.  
 
Discrete Power Device wafers with customizable resistivity, tight resistivity control, low and controlled Oi level as well as low defect density enable extremely high performing discrete power devices with reduced power losses. Discrete Power Device wafers are BMD, dislocation and slip free. In addition, the COP levels can be controlled if needed. The Discrete Power Device wafers enable customers to grow misfit-free epi layers with very low metal impurity levels leading to better device performance.   

IGBTs, Power MOSFETs, Schottky and power diodes, power BJTs, thyristors as well as other high voltage and high current devices all benefit from wafers that are specifically tailored for their needs.

Okmetic Discrete Power Device wafers are widely used e.g. in IGBTs, power MOSFETs, Schottky and power diodes, power BJTs, thyristors as well as in as well as in other high voltage and high current devices.  

Resistivities between <0.001 and >350 Ohm-cm  

Okmetic has wide selection of 150 to 200 mm wafers tailored for the needs of discrete power devices. Wafer parameters can be freely adjusted according to customer needs. Resistivities usually vary between <0.001 and >350 Ohm-cm, but even higher resistivities are possible. The selection of dopants includes antimony, arsenic, boron and phosphorus. Crystal orientations include <100>, <110> and <111>. Wafer thicknesses range from 380 to >1,150 µm and backside treatment can be etched, polished, polyback or LTO. Customizable combinations of poly and LTO (poly, LTO, poly-LTO, LTO-poly, poly-LTO-poly). Wafer bow can be reduced by using Okmetic low-stress poly. Wafer edge can also be customized to optimal shape. As an example, asymmetric edge with narrow bevel can bring benefits in the device manufacturer’s back grinding and front bevel process. 

A-MCz® crystal growth method beneficial for IGBTs 

The medium to high resistivity wafers manufactured with our advanced MCz (A-MCz®) crystal growth method have shown excellent performance and cost-effectiveness over wafers manufactured with FZ method. Our A-MCz® wafers have also increased the yields of customers’ processes as their enhanced lattice robustness reduces dislocations and breakage and their level of bulk micro defects is extremely low. Donor generation effects and precipitation behavior can also be taken into account by adjusting Oi level.  

Benefits of Ultra Low Oi A-MCz® crystal growth method: 

  • Better slip resistance and radiation hardness compared to FZ
  • Very low Oi level is possible
  • No Bulk Micro Defects
  • Excellent for High Voltage applications (like IGBT)

Discrete Power Device wafer specifications 

Growth method Cz, MCz, A-MCz®
Diameter 150 mm, 200 mm 
Crystal orientation <100>, <110>,<111> 
N type dopants Antimony, Arsenic, Phosphorus 
P type dopants Boron 
Resistivity Between <0.001 and >350 Ohm-cm* 
*Resistivity range varies by dopant and orientation 
OxygenCan be optimized to Customer process
SSP (etched backside) wafer thickness 200 mm: 550 to 1,150 µm*  
150 mm: 400 to 1,150 µm 
*Other thicknesses possible with certain limitations  
DSP (polished backside) wafer thickness 200 mm: 380 to 1,150 µm* 
150 mm: 380 to >1,150 µm
*Other thicknesses possible with certain limitations 
SSP backside treatmentEtched, Polyback, LTO 
Fully CMOS compatible wafer surface quality and cleanliness requirements  

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