SOI wafers

Silicon on Insulator wafers enable completely new device designs

Our Silicon on Insulator (SOI) wafers are manufactured by bonding technology. Two silicon wafers are bonded together, having an insulating oxide between. In a typical application sensing elements and possible IC devices are built on the active layer. Oxide is an effective etch-stop, and can act also as a sacrificial layer. Handle wafer is supporting the structure but it can also be utilized in sealing the structure or as part of the sensing element.

Okmetic Silicon on Insulator (SOI) products

Controlling the whole wafer manufacturing line in-house enables Okmetic to monitor all the critical parameters for the highest quality SOI. This enables the option to select electrical conductivity, and e.g. SOI with different combinations of crystallographic orientations to utilize anisotropic properties of silicon.

Typical SOI wafer specifications

Growth method
Cz, MCz
Diameter
100, 150, 200 mm
Crystal orientation
<100>, <110>, <111>
N type dopants
antimony, arsenic, phosphorus, red phosphorus
P type dopants
boron
Resistivity
<1mOhm-cm up to over 5,000 Ohm-cm
Thickness
SOI layer: up to > 200 µm, standard tolerance ±0.3µm
(for specific applications < even tighter)
Handle wafer: from 300 µm to 950 µm
back surface polished or etched
Buried oxide:
Type:thermal oxide

Okmetic BSOI solutions are used i.a. for advanced pressure sensors, microfluidic components, MOEMS, flow sensors, actuators, 3-axis accelerometers, gyroscopes and silicon microphones. They also offer a new type of solution for the manufacturers of RF components and high voltage applications such as gate drivers (IGBT/Power MOSFET), smart power/high voltage BCD and lateral HV devices. The possibility to tailor and modify parameters helps reach the full potential of any design idea in advanced device development.

Often combined with DRIE etching, the main benefits of BSOI include:

  • the option for vertical sidewalls
  • high etching rate, and effective etch stop
  • predictable and consistent bulk behavior in etching
  • excellent accuracy and uniformity of the etched structures

Okmetic C-SOI is a bonded SOI wafer with built-in sealed cavities on the handle wafer or on the buried oxide. As the patterning is etched before bonding, C-SOI makes it possible to process complex and developed structures that standard BSOI wafers do not allow. The process enables extremely thin membranes, which widens the variety of design and processing possibilities. The application areas include e.g. pressure sensors, silicon microphones and fluidic components, while thicker layers are suitable for inertial sensor manufacturing. Okmetic C-SOI can also be used in IC and MEMS process integration. It also enables integrated backside packaging and hermetic sealing. 

The main benefits of C-SOI are:

  • the reduction of device size and cost, without compromising the device precision
  • more streamlined device manufacturing process
  • optimization of electrical properties E.g. minimization of parasitic capacitances
  • flexibility to adjust the gap between released structure and the substrate
  • well-defined horizontal dimensions

Okmetic E-SOI is an enhanced Silicon on Insulator wafer with a new level of layer thickness uniformity and unprecedented properties. E-SOI is an ideal platform for demanding applications such as HV BCD devices, silicon photonics and high-precision silicon-based MEMS (Micro Electro Mechanical Systems) sensors. The device layer thickness of E-SOI is freely adjustable between 1.0 µm and >100 µm and the thickness tolerance independent of target thickness is as low as +/-0.1 µm. Also the buried oxide thickness is freely adjustable between 0.5 µm and 3 µm.

One can choose from a wide selection of silicon starting materials from Okmetic’s in-house crystal growth, and there is similar flexibility in wafer customization as with Okmetic BSOI wafers. The core benefit of E-SOI wafer, compared to standard BSOI is superior layer thickness uniformity.

Significantly lower device layer thickness variation can be utilized:

  • to enable completely new designs that have been out of reach with traditional technologies
  • by using bonded SOI wafers in applications traditionally done with other SOI technologies
  • to improve device performance and yield with existing designs
  • to reduction of device size and cost, without compromising the device precision

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